1. Field of the Invention
The present invention relates to a semiconductor device and, more particularly, to a semiconductor device having a thermoelectric cooler (TEC).
2. Description of the Related Art
With the development of semiconductor technology, and the pressing demand of users, recent trends in the electronics industry are towards minimization, light-weight construction and multi-function. To meet these demands, multi-chip packaging techniques have been introduced. Multi-chip packages (MCPs) include a plurality of semiconductor chips in a single package. MCPs manufactured by such techniques are advantageous in size, weight and mounting area over those including a plurality of packaged semiconductor chips.
FIG. 1 is a cross-sectional view of one example of a conventional semiconductor chip package.
Referring to FIG. 1, a semiconductor chip package 910 may be a multi-chip package including a plurality of semiconductor chips 911 and 913. Each of the semiconductor chips 911 and 913 may be an edge-pad-type semiconductor chip package. Bonding pads 912 and 914 may be arranged along the edges of the semiconductor chips 911 and 913, respectively. The semiconductor chips 911 and 913 may be stacked on a substrate 921.
The semiconductor chips 911 and 913 may be connected to, for example, terminals 93 on the substrate 921 by wires 931. A spacer 917 may be formed between the semiconductor chips 911 and 913. The spacer 917 may establish the height of the wire loop of the wire 931 of the semiconductor chip 911.
An encapsulant 961 may seal the semiconductor chips 911 and 913, the wires 931 and a connection portion. The encapsulant 961 may be formed of epoxy molding compound (EMC).
Solder balls 971 may be formed on the bottom surface of the substrate 921. The solder balls 971 may be used as external connection terminals.
The conventional semiconductor chip package may have several disadvantages caused by thermal stresses. For example, in case of a multi-chip package having a spacer between semiconductor chips, release of heat between the chips may be difficult to realize. In some instances, heat may accumulate between chips, which is referred to as the heat trapping phenomenon. As a result heat transfer from a semiconductor chip to a substrate through solder balls may be reduced.
With high-speed operation and high integration, the junction temperature of internal circuits of a semiconductor chip may increase, which may lead to an increased amount of heat generation. If the increased amount of generated heat is released poorly, in the case of electronic equipment using a semiconductor chip package such as a mobile product, characteristics of the semiconductor chip package such as refresh characteristics, operating speed and cycle life may decrease.